Research Interest

Professor Gaede is an Assistant Professor at The University of Alabama in Huntsville. She has developed new courses in Computer Arithmetic, VHDL Modeling and Testing of Digital Circuits. She teaches extensively in the Computer Engineering program.

Degrees

• BSEE, Southern Methodist University, 1981 (magna cum laude)
• MSEE, The University of Texas at Austin, 1986
• Ph.D., The University of Texas at Austin, 1988

Recent Publications

J.M. English, J.H. Kulick, D.J. Coe, and R.K. Gaede, “MEMS Assisted Cryptography IP Protection”, IEEE Security and Privacy, July/August 2007, pp. 14-21

"MEMS-Assisted Cryptography for CPI Protection," J.M. English, J. Kulick, D.J. Coe, and R.K. Gaede, IEEE Security and Privacy, June 2007.

Jennifer English, David Coe, Rhonda Gaede, Jeffrey Kulick, "Protection of Cryptographic Systems Using Reconfigurable MEMS-Based Tamper Sensors," Proceedings of the Reconfigurable Systems, Microsystems, and Nanotechnology Conference, Redstone Arsenal, May 8, 2007.

Alex Milenkovic, Jeffrey Kulick, Rhonda Gaede, "Tamper Protection of Hardware / Software Systems Using Dynamic Re-configuration Of Instruction Sets and Netlists in FPGAs," Proceedings of the Reconfigurable Systems, Microsystems, and Nanotechnology Conference, Redstone Arsenal, May 9, 2007.

Gladstone Adderley, Rhonda Gaede, Jeffrey Kulick, "Verification of Hardware/Software Co-Designed Systems Utilizing Re-configurable Hardware," Proceedings of the Reconfigurable Systems, Microsystems, and Nanotechnology Conference, Redstone Arsenal, May 9, 2007.

M. M. Thaturi, S.M. Yoo, and R. Gaede, "An efficient VLSI implementation of IDEA encryption algorithm using VHDL," Microprocessors and Microsystems, Volume 29, Issue 1, pp. 1-7, February 2005.

"Designing an Interconnection Test Bed," Rhonda Kay Gaede, Jeffrey H. Kulick, Deborah A. Butler, Proceedings of the Mentor Graphics International Users Group Meeting, Denver, Colorado, February 25-27 (2002).

"Exploring the Hardware/Software Continuum in a Computer Engineering Capstone Design Class using FPGA-based Programmable Logic," Sin Ming Loo, B. Earl Wells, Rhonda K. Gaede, Microelectronic Systems Education Conference, Las Vegas, NV, June 17-18 (2001).

"Hardware-Assisted Characterization of NAS Benchmarks," W. E. Cohen, R. K. Gaede, W. D. Garrett, Cluster Computing, Volume 4, Issue 3, pp. 189-196, July (2001).

"Designing and Interconnection Testbed," R. Gaede, D. Butler, M. Sweet, and J Kulick, Proceedings of the 2001/2002 MUG Conference, (2001).

"Amorphous Silicon Photodetector for Optical Interconnections," Rhonda Gaede, Fenglei Li, David Hyde and Dashen Shen, J. Non-crystalline Solids, Vol. 266-269, p. 1208 (2000).

"Implementation of Recovery Blocks on Cache-Coherent Distributed Memory Systems," Diana Hecht, Krishna Kavi, and Rhonda Gaede, Proceedings of the 1999 International Symposium on Parallel Architectures, Algorithms, and Networks (I-SPAN'99), Freemantle, Western Australia, June (1999).

"Demonstration of Repeatable Non-Intrusive Measurement of Program Performance and Compiler Optimization in Linux Using IN-Tune," W.E. Cohen, Rhonda K. Gaede and Jeremy B. Rodgers, submitted to Software - Practice and Experience, April (1999).

"IN-Tune: An In-Situ Non-Invasive Performance Tuning Tool for Multi-threaded Linux on Symmetric Multiprocessing Pentium Workstations," J. Rodgers, Rhonda Kay Gaede, and Jeffrey H. Kulick, accepted for publication in Software - Practice and Experience, Editor's letter dated February (1999).

"Simulation-based Evaluation of the Simultaneous Optical Multiprocessor Exchange Bus," Constantine Katsinis, Rhonda Gaede, and Jeffrey Kulick, submitted to Simulation, October (1998).

"A Partitionable Dynamic Barrier System for an Optical Packet Based Bus," W.E. Cohen, D.W. Hyde and R.K. Gaede, submitted to IEEE Transactions on Computers, June (1998).

"Evaluation of a Multi-Process Cache Architecture with a Separate Secondary Cache Per Process," Rhonda Kay Gaede, Freddy Golos, Michael D. McMahan and Jeffrey H. Kulick, Computers and Electrical Engineering Journal, 24, No. 3/4, pp. 201-221, May (1998).

Other Significant Publications

Rhonda Gaede, Fenglei Li, David Hyde and Dashen Shen, “Amorphous Silicon Photodetector for Optical Interconnections”, accepted for publication in the Journal of Non-Crystalline Solids Special Issue on Amorphous and Microcrystalline Semiconductors.

W. E. Cohen, D. W. Hyde and R. K. Gaede, “A Partitionable Dynamic Barrier System for an Optical Packet Based Bus”, accepted for publication with minor revisions IEEE Transactions on Computers.

R. G. Lindquist, J. Kulick, W. E. Cohen, R. K. Gaede, B. E. Wells, M. Abushagur, D. Shen, C. Katsinis, and S. T. Kowel, An Optoelectronic Design of the Simultaneous Optical Multiprocessor Exchange Bus (SOME-Bus), Photonics West, Optoelectronics 97, Integrated Devices and Applications, Hybrid and Monolithic OEICs, Optoelectronic Interconnects and Packaging IV, SPIE Proceedings 3005, February 12-14, 1997, San Jose, California.

J. Kulick, W. E. Cohen, C. Katsinis, E. Wells, A. Thomsen, R. K. Gaede, R. G. Lindquist, G. P. Nordin, M. Abushagur and D. Shen, The SOME (Simultaneous Optical Multiprocessor Exchange) Bus, Proceedings of the 2nd Massively Parallel Processing using Optical Interconnections Conference, San Antonio, Texas, October 1995, pp. 336-344.

K. Torku, S. Parise and R. K. Gaede, Modeling of Bipolar DCS DOT Circuits, 35th Midwest Symposium on Circuits and Systems, Washington, D. C., August, 1992.

J. Rodgers, Rhonda Kay Gaede, and Jeffrey H. Kulick, “IN-Tune: An In-Situ Non-Invasive Performance Tuning Tool for Multi-threaded Linux on Symmetric Multiprocessing Pentium Workstations”, Software – Practice and Experience, Volume 29(9), pp. 775-792, September, 1999.

Rhonda Kay Gaede, Freddy Golos, Michael D. McMahan and Jeffrey H. Kulick, “Evaluation of a Multi-Process Cache Architecture With a Separate Secondary Cache Per Process”, Computers & Electrical Engineering, volume 24, no. 3/4, May 1, 1998, pp. 201-221.

D. Zein, G. Ditlow, R. K. Gaede and C. Beh, “FAME: Fault Analysis and Modeling Environment”, IBM Test ITL Proceedings, Manassas, Virginia, Paper 13, April 1992.

R. K Gaede and C. Beh, “A Stuck Fault Modelling Procedure Based on Circuit Model”, IBM Test ITL Proceedings, East Fishkill, New York, Paper 29, September 1989.

R. K. Gaede, M. R. Mercer, K. M. Butler and D. E. Ross,” CATAPULT: Concurrent Automatic Testing Allowing Parallelization and Using Limited Topology”, Proceedings of the 25th Design Automation Conference, Anaheim, California, June 1988, pp. 597-600.

Graduate Students

Doctoral Degree Graduates

Maha El Naggar, Doctoral Dissertation, "Analysis and Simulation of an Integrated Optical Receiver," May 2001.

Plan I (Thesis) Master's Degree Graduates

Vinuthna Vattikonda, MSE, "Hardware Implementation of Stream-Based Trace Compression," December 2004.

Ajayshanker Krishnamurthy, MSE, "Distributed Reliable Multicase Protocol for the SOME-Bus Network," Fall 2003.

William D. Garrett, MSE, "A Trace-Based Approach to Modeling Interconnection Networks," May 2001.

Mary Susan Tweeton, MSE, "Bytewise Selectable 32-Bit EDAC Implemented in VHDL," May 1999.

Fyodor Golos, MSE, "Performance Analysis of the Process Cache for Both Instruction and Data Traces," December 1998.

David Wells Hyde, MSE, "A Receiver Model for a Fully Connected Multiprocessor System," April 1996.

Plan II (Project) Master's Degree Graduates

Supraja Gaini, Paper Title: "Functional Testing of Semiconductor Random Access Memories and Fault Tolerance Schemes Used in RAMS," June 1993.

Plan II (Course Only) Master's Degree Graduates