CPE 526 - VLSI Using Hardware Description Languages, Modeling, and Synthesis

Homework #1

Homework #1 Files

Converter Entity

Converter Behavioral Architecture

Converter Dataflow Architecture

Converter Structural Architecture

Source for pulse_gen

Converter Test Bench

Test Bench Configuration (Behavioral Architecture)

Test Bench Configuration (Dataflow Architecture)

Test Bench Configuration (Structural Architecture)

Homework #2

Homework #2 Solution Files

Homework #3

Testbench Example Reading from Text File

Text File

Homework #3 Thunderbird VHDL

Homework #3 Thunderbird Test Bench VHDL

Homework #4

Extra Credit Homework


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