CPE 526 - VLSI Using Hardware Description Languages, Modeling, and Synthesis

CPE 526 - VLSI Using Hardware Description Languages, Modeling, and Synthesis

Homework #1

Converter Entity

Converter Behavioral Architecture

Converter Dataflow Architecture

Converter Structural Architecture

Source for pulse_gen

Converter Test Bench

Test Bench Configuration (Behavioral Architecture)

Test Bench Configuration (Dataflow Architecture)

Test Bench Configuration (Structural Architecture)

Homework #2

Homework #3

Homework #4

Extra Credit Homework

webmaster@eng.uah.edu