Information: Updating design information... (UID-85) **************************************** Report : timing -path end -delay max -nworst 5 -max_paths 40 Design : ADD Version: Z-2007.03-SP3 Date : Mon Oct 29 17:29:03 2007 **************************************** Operating Conditions: Wire Load Model Mode: top Endpoint Path Delay Path Required Slack ------------------------------------------------------------------------ C_reg[1]/D (FD2) 4.68 f 4.15 -0.53 C_reg[1]/D (FD2) 4.68 f 4.15 -0.53 C_reg[1]/D (FD2) 4.50 r 4.15 -0.35 C_reg[1]/D (FD2) 4.50 f 4.15 -0.35 C_reg[1]/D (FD2) 4.50 f 4.15 -0.35 C_reg[0]/D (FD2) 3.63 f 4.15 0.52 C_reg[0]/D (FD2) 3.63 f 4.15 0.52 C_reg[0]/D (FD2) 3.44 r 4.15 0.71 C_reg[0]/D (FD2) 3.44 r 4.15 0.71 C[0] (out) 1.63 r 2.50 0.87 C[0] (out) 1.53 f 2.50 0.97 C[1] (out) 1.42 f 2.50 1.08 C[1] (out) 1.34 r 2.50 1.16 C_reg[0]/D (FD2) 2.75 f 4.15 1.40 1