Description:
This class will concentrate on principles and concepts of
digital signal processing architectures. The real-time performance of
basic signal processing algorithms will be evaluated for different processor architectures.
Advanced issues like power efficiency and scheduling issues will be introduced.
DSP based project is mandatory for this course.
Course Outline:
1. Introduction and Review (Chap #1, #2, and #3)
- DSP system design
- VLSI circuit technologies
- Signal processing systems
2. DSP algorithms (Chap #4 and #6)
- FIR filters
- IIR filters
- FFT and DCT
3. DSP system design
- Scheduling
- Resource allocation
4. DSP Architectures
5. Texas Instruments C62X and C64X architectures
6. Texas Instruments C54X and C55X architectures
7. Real-time performance issues
8. DSP project
Tentative Grading CPE610 (DSP Architectrure):
Homework assignments 30%, Assay/Project 20%,
DSP project 50%
Text book:
- Lars Wanhammar, DSP Integrated Circuits, Academic Press, 1999.
- Nasser Kehtarnavaz, Burc Simsek, C6X-Based Digital Signal Processing, Prentice Hall, 2000.
Other references:
- J. Eyre, J. Bier, "The Evolution of DSP Processors from Early Architectures to the Latest Developments", IEEE Signal Processing Magazine, Vol. 17, No. 2, March 2000, pp. 43-51.
- W. Strauss, "Digital Signal Processing, The New Semiconductor Industry Technology Driver", IEEE Signal Processing Magazine, Vol. 17, No. 2, March 2000, pp. 52-56.
- J. Du, G. Warner, E. Vallow, T. Hollebach, "High-Performance DSPs", IEEE Signal Processing Magazine, Vol. 17, No. 2, March 2000, pp. 16-26.
- J. Fridman, "Sub-Word Parallelism in Digital Signal Processing", IEEE Signal Processing Magazine, Vol. 17, No. 2, March 2000, pp. 27-35.
- E. Stotzer, E. Leiss, "Modulo Scheduling for the TMS320C6X VLIW DSP Architecture"
WWW sites:
- http://www.mkp.com Morgan Kaufman Publishers
- http://www.ti.com Texas Instruments
- http://www.prenhall.com Prentice Hall
- ftp://ftp.ti.com/mirrors/tms320bbs/00index.htm TI DSP FTP
Homeworks: